Context: 

IIT Madras and ISRO have developed an indigenous microprocessor SHAKTI for space applications. 

SHAKTI Microprocessor Project

• It is led by IIT Madras at Prathap Subrahmanyam Centre for Digital Intelligence and Secure Hardware Architecture (PSCDISHA) in the Department of Computer Science and Engineering.
• The SHAKTI class of systems are based on RISC-V, an open-source Instruction Set Architecture (ISA), for designing custom processors. 
• The Indigenous RISCV Controller for Space Applications (IRIS) chip was developed from the SHAKTI processor baseline.

Key Features of IRIS Chip: 

• It was Developed to support ISRO’s command and control systems and other critical functions.
• Designed for fault tolerance and reliability, making it suitable for space missions.
• Includes custom modules like CORDIC, WATCHDOG and Timers and advanced serial buses.
• Can be expanded for future missions through multiple boot modes and hybrid memory extensions.
• It can be used in diverse domains from IoT and computing systems for strategic needs.
• This is the third SHAKTI chip successfully developed in India after RIMO in 2018 and MOUSHIK in 2020.
• IRIS chip was built using SCL Chandigarh 180 nm technology node which demonstrates India’s growing capability in semiconductor manufacturing. 
• Semi-Conductor Laboratory (SCL) is an autonomous body under the Ministry of Electronics & Information Technology (MeitY).

The SHAKTI Processor Program:

SHAKTI is an open-source initiative taken in 2014 by the Reconfigurable Intelligent Systems Engineering (RISE) group at IIT-Madras. 

It is backed by the Ministry of Electronics and Information Technology under its ‘Digital India RISC-V’ initiative (DIRV). 

• DIRV was first announced in 2022 to enable the creation of Microprocessors for the future in India.

The aim of SHAKTI is to indigenously produce production-grade processors, complete System on Chips (SoCs), development boards and SHAKTI-based software platform that offer best-in-class security and visibility for users adopting RISC-V technology.